This invention relates to the operational control of a digital computer system, and more particularly, to the digital logic circuitry for detecting a predetermined character of a data string before operating on the data string, the predetermined character of the present invention being a trailing sign character of the data string.
An objective, which almost always faces designers furthering the advancement of digital computers, is to decrease the time required for executing each of the instructions executed by the digital computer, thereby decreasing the overall time required by the digital computer to perform a predefined task. Many schemes have been devised by digital computer designers in an attempt to meet this objective. In the execution of some instructions, prior knowledge of the sign of the operand data can be helpful in speeding up the execution time of the instruction. In some prior digital computer systems, stacks (storage devices) are utilized to hold or temporarily store the operand data required by an execution unit of the digital computer system. Stacks of these prior digital computer systems which are utilized to temporarily store a single operand, have a predetermined starting point and access to the sign character can be had with relative ease prior to executing the instruction. However, obtaining the sign of the operand data in a digital computer system, in which the data can be of variable length and loaded into a stack beginning at a variable starting addresses, presents a problem to the designer trying to decrease the execution time. Further, for a digital computer system having a plurality of operand data formats, including a data format which has a trailing sign (i.e. the sign character is the lagging character rather than the leading character read from a main memory unit), obtaining the sign information of the operand data prior to executing the instruction can cause the overall execution time to increase rather than decrease, especially where the sign is in the least significant bit position and the operand data is read from storage most significant bit first.
The logic circuit of the present invention is implemented in a digital computer system having a plurality of operand data formats, including a data format having a trailing sign, and which further utilizes an operand data stack in which operand data of variable length is loaded at variable starting addresses. The logic circuit of the present invention detects the end of the data string for indicating the location of the sign character of the operand data as the operand data is being loaded into the stack. When the instruction is subsequently executed, the sign of the operand data is immediately available thereby aiding in decreasing the execution time of the instruction.